Three-Stage Operational Amplifier with Frequency Compensation Using Cascade Zero

Abstract

Short channel MOSFET exhibits the characteristics of wide bandwidth and low DC gain. A low DC gain causes a high gain error and a narrow output linear range in the closed loop. The DC gains can be improved by using the cascade structure, but frequency compensation is required due to the increase in the number of poles. The output nodes of each stage in a cascade Common-Source amplifier have a cascade of zero, and this zero is cancelled out by the input node of the next stage. This paper proposes a three-stage operational amplifier (op-amp) with frequency compensation using cascade zero. This op-amp was implemented in the 180 nm CMOS technology and achieved 86.96 MHz unity–gain frequency, 51.7° phase margin at 32 pF load capacitor and 99.83 dB DC gain, that is, a 36.21 dB improvement over a two-stage op-amp with the same power consumption. The op-amp consumed 7.74 mW with a supply voltage of 1.8 V.