Experimental investigation of buffer traps physical mechanisms on the gate charge of GaN-on-Si devices under various substrate biases

Abstract

The gate charge change (ΔQg) of GaN-on-Si power devices subjected to different substrate biases has been investigated. On-wafer pulse-mode voltage stress measurement is examined to probe the physical insight of different trap mechanisms into Qg characteristics. Distinct injected electrons interacting with the buffer traps lead to a significant decrease (increase) in Qg under negative (positive) substrate bias. Different levels of degradation on ΔQgd to ΔQgs after stress under negative and positive substrate biases indicate uneven distribution of acceptor-like traps and uniform distribution of donor-like traps in the GaN buffer level. Using Arrhenius plots associated with the ΔQg shift, three dominant buffer traps with activation energies of EV + 0.542 eV, EC-0.604 eV, and EC-0.608 eV are extracted.