A DC-link Capacitor-voltage Balancing Strategy Without Current Sensors for Four-level π-type Inverters

Abstract

When the conventional modulation is applied to the four-level π-type inverter, the voltage of the intermediate capacitor on the DC-link will be biased, which restricts the large-scale application of the four-level π-type inverter. In order to reduce the voltage bias speed of the intermediate capacitor of the DC-link, the virtual vector PWM (VVPWM) modulation can be adopted. But the voltage of the intermediate capacitor will still be biased in a long-time operation, which will lead to the switch overvoltage resulting in the inverter failure. Therefore, a fast four-level VVPWM synthesis method based on simplified three-level SVPWM was proposed, and based on the inherent characteristics of the inverter, a DC-link capacitor-voltage balancing strategy without current sensors was implemented. The DC-link capacitor voltage can be balanced with modulation indexes from 0 to 1.15. And finally the effectiveness of the modulation strategy was proved by experiments.