Overview of Ferroelectric Memory Devices and Reliability Aware Design Optimization

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Abstract

Since the discovery of CMOS-compatible and highly scalable ferroelectric HfO2, there has been a significant revival of interest in developing ferroelectric devices for high performance and energy-efficient embedded nonvolatile memories. Multiple ferroelectric memory devices are under investigation by harnessing the nonvolatile polarization states. These devices include the ferroelectric FET (FeFET), ferroelectric capacitor based random access memory (FeRAM), and ferroelectric tunnel junction (FTJ). Though the underlying memory storage mechanisms are the same in these devices, their memory sensing mechanisms are different. This difference leads to fundamentally different, and even opposite ferroelectric optimization directions. Given their different characteristics and individual advantages, it is likely that all these devices will co-exist to meet varying needs. Therefore, it is important to establish and compare the design guidelines for the three different ferroelectric memory devices. The design optimization will also be constrained by the reliability limit, which is critical to guarantee the success of the ferroelectric memory devices.

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Deng, S., Zhao, Z., Kurinec, S., Ni, K., Xiao, Y., Yu, T., & Narayanan, V. (2021). Overview of Ferroelectric Memory Devices and Reliability Aware Design Optimization. In Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI (pp. 473–478). Association for Computing Machinery. https://doi.org/10.1145/3453688.3461743

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