A Low-Noise Instrumentation Amplifier with Built-in Anti-Aliasing for Hall Sensors

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Abstract

We present a compact, versatile Hall readout system with digital output, fully integrated in 180nm technology. The core of the system is an instrumentation amplifier architecture that provides inherent anti-aliasing filtering, where the anti-aliasing characteristic is locked into a shape that maximally prevents aliasing to low frequencies. The efficiency for blocking out-of-band white noise is comparable to that of a second-order filter, eliminating the need for an explicit anti-aliasing filter before the ADC. Chopping/spinning is applied for up-modulating offset and 1/f noise to just beyond the signal band. A mostly-digital ripple reduction loop (RRL) is added for mitigating offset-related dynamic range limitations. In this, a bilinear integrator is introduced for eliminating the impact of the RRL on the system's DC gain. Moreover, the resolution of the DAC generating the analog offset compensation is reduced significantly, and the effect thereof is eliminated by digital noise cancellation logic. The one-step amplification and the simple, low-resolution DAC for offset compensation both aid in keeping the area footprint low: the analog circuits (including DAC and ADC) only occupy 0.21mm2. Notable performance characteristics are an input-referred noise floor of 55nT/ {{Hz}} within a 410kHz bandwidth, a current consumption of only 5.1mA, and a 47dB dynamic range. The amplifier architecture can be easily applied as an analog preconditioning circuit in other sensor readout situations as well.

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Riem, R., Raman, J., Borgmans, J., & Rombouts, P. (2021). A Low-Noise Instrumentation Amplifier with Built-in Anti-Aliasing for Hall Sensors. IEEE Sensors Journal, 21(17), 18932–18944. https://doi.org/10.1109/JSEN.2021.3090251

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