Abstract
A method of designing compact multiple-input combinational logic circuits is proposed. We show that i) fundamental logic gates can be constructed by a small number of collision-based fusion gates, ii) multiple-input logic gates are constructed in a systematic manner, iii) the number of transistors in specific logic gates constructed by the proposed method is significantly smaller than that of conventional logic gates. © IEICE 2006.
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Yamada, K., Motoike, I. N., Asai, T., & Amemiya, Y. (2006). Design methodologies for compact logic circuits based on collision-based computing. IEICE Electronics Express, 3(13), 292–298. https://doi.org/10.1587/elex.3.292
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