PIM-DH: ReRAM-based Processing-in-Memory Architecture for Deep Hashing Acceleration

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Abstract

Deep hashing has gained growing momentum in large-scale image retrieval. However, deep hashing is computation- and memory-intensive, which demands hardware acceleration. The unique process of hash sequence computation in deep hashing is non-trivial to accelerate due to the lack of an efficient compute primitive for Hamming distance calculation and ranking. This paper proposes the first PIM-based scheme for deep hashing accelerator, namely PIM-DH. PIM-DH is supported by an algorithm and architecture co-design. The proposed algorithm seeks to compress the hash sequence to increase the retrieval efficiency by exploiting the hash code sparsity without accuracy loss. Further, we design a lightweight circuit to assist CAM to optimize hash computation efficiency. This design leads to an elegant extension of current PIM-based architectures for adapting to various hashing algorithms and arbitrary size of hash sequence induced by pruning. Compared to the state-of-the-art software framework running on Intel Xeon CPU and NVIDIA RTX2080 GPU, PIM-DH achieves an average 4.75E+03 speedup with 4.64E+05 energy reduction over CPU, 2.30E+02 speedup with 3.38E+04 energy reduction over GPU. Compared with PIM architecture CASCADE, PIM-DH can improve computing efficiency by 17.49× and energy efficiency by 41.38×.

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Liu, F., Zhao, W., Chen, Y., Wang, Z., He, Z., Yang, R., … Jiang, L. (2022). PIM-DH: ReRAM-based Processing-in-Memory Architecture for Deep Hashing Acceleration. In Proceedings - Design Automation Conference (pp. 1087–1092). Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1145/3489517.3530575

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