Reconfigurable computing: toward software defined chips

Abstract

With the rapid development of technology, software is rapidly evolving with emerging applications. Chips that fail to adapt to software (e.g., application-specific integrated circuits, ASICs) suffer from a short lifecycle and high nonrecurring engineering (NRE) costs. Meanwhile, as the projection of Moore's law and Dennard scaling are decreasing, energy efficiency has shown a diminishing return with new technologies. The computing capacity of general-purpose processors is limited due to power budgets. Consequently, future chips must jointly optimize flexibility, power efficiency, and ease of programmability. Reconfigurable chips combine the high flexibility of a general-purpose processor and high energy efficiency of ASIC by providing on-demand customization of their architectures. This article thoroughly reviews the development and architecture of reconfigurable chips. Moreover, the future challenges of reconfigurable chips are analyzed. Based on these challenges, future directions are also discussed.