Cu contamination of the nMOSFET in a 3-D integrated circuit under thermal and electrical stress

Abstract

The Cu contamination behavior of 3D integrated circuits under thermal and electric field stress was studied by monitoring the degradation of the pn + diodes performances of the nMOSFETs. For CuSiO 2Si- devices, the leakage current of the pn + diodes increased after thermal stressing, which indicates using SiO 2 as an insulation layer is quite dangerous for Cu contamination. With the nMOSFET was turned-on, only the leakage current of the bulk-source diode increased, which suggested that the Cu contamination occur preferentially to the source than drain region. © 2012 The Electrochemical Society.