UAV-NAS: UAV Identification on FPGAs via Neural Architecture Search

Abstract

Accurate identification of unmanned aerial vehicles (UAVs) is essential in industrial and military environments. While deep learning has shown strong performance in UAV identification, existing models remain difficult to deploy on edge platforms due to their high computational and memory demands. To address this challenge, we propose UAV-neural architecture search (NAS), a scalable NAS framework that discovers accurate and energy-efficient models for fast fourier transform (FPGA)-based UAV identification. UAV-NAS combines greedy optimization of macroarchitecture with differentiable architecture search over a cell-based operation space, reducing search cost while maintaining classification accuracy. The search space is designed for I/Q sequences, allowing the resulting architectures to operate directly on raw samples without preprocessing overhead. For hardware deployment, each discovered cell maps to a reusable hardware block with node-level buffering, enabling scalable deployment from compact edge FPGAs to larger multi-super logic region devices. Deployed on a Xilinx KV260, UAV-NAS achieves 0.83 F1-score on 13 classes and maintains robustness under 23-class expansion. The system reduces energy consumption by 88.7% compared to CPU execution, demonstrating practical viability for energy-constrained industrial UAV monitoring systems.