Preparation and Performance Analysis of Thin-Film Artificial Intelligence Transistors Based on Integration of Storage and Computing

Abstract

In this study, a thin-film artificial intelligence transistor device based on the integration of memory and computing was designed and assessed. For this device, skyrmions were used to construct an integrated memory and computing architecture that combined content-addressable memory functions and logic operational functions. First, a dual memory cell under vertical current control was designed; based on this, a current-driven skyrmion track memory was constructed. Then, the logic gate components of the skyrmion track were constructed as the operation module. Subsequently, simulates were conducted on the device, and the results showed that when Db = 0 mJ/m2 and 3 mJ/m2, Wb = 0 nm, and the position of the temporal lateral displacement curve was highest. When Wb = 18 nm, the position of the temporal lateral displacement curve was lowest. In the logic gate performance simulate, the moving speed of the skyrmion reflected a positive proportional relationship with driving-current density. Finally, in the skyrmion moving simulate, the upper part of the system stably displayed NOR operational functions, and the lower end stably displayed NAND operational functions. This research lays the foundation for designing a fifth-generation AI processor in which storage and computing are integrated.