Metal Wet Etch Issues and Effects in Dual Metal Gate Stack Integration

Abstract

This article discusses metal wet etch issues and their effects on high- k /metal films in dual work function metal gate stack integration. A versatile process using metal wet etch has been demonstrated to integrate dual metal gate complementary metal oxide semiconductor (CMOS) devices (Z. B. Zhang, in 2005 Symposia on VLSI Technology and Circuits, Kyoto, Japan, June 14-18, 2000). Different high- k /metal films, combinations of films, etch selectivity, thermal stability, interactions among the films, and finally, surface conditions have made the implementation of metal wet etch challenging. Here, representative results using HfO2, HfSiON, in situ steam generated silicon oxide (SiO2), TiN, Ta, TaSiN, TaCN, TiSiN, amorphous silicon (a-Si), and tetraethylorthosilicate in dual metal CMOS processing are presented. © 2006 The Electrochemical Society. All rights reserved.