Modified postannealing of the Ge condensation process for better-strained Si material and devices

Abstract

A modified postannealing at 1000 °C in N2 ambient has been carried out to improve the Ge distribution in the SiGe layer fabricated by the Ge condensation process, which is a potential technique for strained Si fabrication. Three kinds of SiGe-on-insulator samples have been fabricated by so-called Ge condensation, which is the oxidation of the SiGe layer on an insulator to enhance the Ge fraction. After different postannealing processes and the necessary cleaning steps, 20-nm-thick strained Si films are epitaxially grown on them. Though the differences of surface topography among the three samples are not great, the one with the modified postannealing process has the most uniform Ge element distribution and the least misfit dislocations. Meanwhile, the strain values obtained by Raman spectra are coherent with the Ge fraction in SiGe near the Si/SiGe interface and the sample with the modified postannealing process has a larger strain value than the one with a conventional postannealing. The performance of metal-oxide-semiconductor field-effect transistors, based on the strained Si samples here, shows a significant enhancement, compared to those based on Si and Si on insulator samples.