Three-side buttable integrated ultrasound chip with a 16, times16 reconfigurable transceiver and capacitive micromachined ultrasonic transducer array for 3-D ultrasound imaging systems

Abstract

This paper presents an integrated ultrasound chip (IUC), which adopts a three-side buttable architecture to integrate a large number of capacitive micromachined ultrasonic transducers (CMUTs) and a reconfigurable 16\,\times\,16 transceiver array to configure the transmitting and receiving patterns of a CMUT array. The IUC was fabricated using a silicon-based MEMS process and a 0.35-\mu{\rm m} CMOS process with 120 V devices. The transmitting and receiving patterns were controlled to optimize the image SNR and frame rate for a given target image. The proposed area-efficient high-voltage level shifter and digital pulse width control scheme were adopted to implement the reconfigurable transceiver array. Furthermore, a static sequential access memory block was implemented to reduce the loading time of the configuration data, which are used to control the IUC. For a 2\,\times\,8 IUC array with a data rate of 400 Mb/s, the data-loading time was reduced from 123.2 to 1 \mu{\rm s}. The image of a spring with a diameter of 1 mm was successfully acquired using the proposed IUC with fully transmitting and receiving array. © 1963-2012 IEEE.