Adaptive voltage positioning (AVP) design of multi-phase constant on-time I2 control for voltage regulators with ramp compensations

Abstract

This paper proposes a multi-phase constant on-time I2 control architecture with adaptive voltage positioning (AVP) for voltage regulators (VRs). By including both fast inner current loop and the slow outer current loop, fast load transient performance and accurate current control can be achieved. In addition, in order to overcome the current ripple cancellation effects over wide duty ratios for future microprocessors, external ramp compensation is added to the proposed control architecture. The small-signal model of the proposed architecture is derived to provide the AVP design guideline, and to understand the design constraints about ramp compensations designs for different operating phases. The Simplis simulation and experimental results are provided to show the good correlations of the derived small-signal model and the effectiveness of the proposed control architecture. The parasitic of the typical output capacitor bank for VRs has also been included in the Simplis simulation bench to predict the load transient performance precisely with different load frequencies.