TEM analysis of Si-passivated Ge-on-Si MOSFET structures for high performance PMOS device technology

Abstract

In this paper, we present a transmission electron microscopy analysis of novel Ge-on-Si MOSFETs using a JEOL 2010F and an aberration-corrected JEOL 2200FSC. A key feature of these devices is the incorporation of a very thin (∼1nm) Si passivation layer on top of the Ge virtual substrate, which is partially oxidised to form SiO2 (∼0.5nm) prior to depositing HfO2 dielectric. We will show that the thin SiO2 layer is not purely amorphous but has some degree of crystal ordering due to being bonded to crystalline materials. Moreover, we will examine the presence of small monolayer variation in Si/SiO2 interface roughness. © 2010 IOP Publishing Ltd.