A unified method to detect transistor stuck-open faults and transition delay faults

Abstract

Detection of transistor stuck-open faults in CMOS circuits requires two-pattern tests. Transition delay fault model is commonly used to model delay causing defects and it also requires two-pattern tests. In this paper we examine the relationship between the two fault models and propose a method for generating test patterns that achieve maximum coverage of both faults. In the proposed method we use an A TPG program for transition delay faults to generate test patterns for both faults. Experimental results are presented to evaluate the effectiveness of our approach. © 2006 IEEE.