High-speed FPGA-based of the particle Swarm optimization using HLS tool

Abstract

The Particle Swarm Optimization (PSO) is a heuristic search method inspired by different biological populations on their swarming or collaborative behavior. This novel work has implemented PSO for the Travelling Salesman Problem (TSP) in high-level synthesis to reduce the computational time latency. The high-level synthesis design generates an estimation of the hardware resources needed to implement the PSO algorithm for TSP on FPGA. The targeted FPGA of this algorithm is the Xilinx Zynq family. The algorithm has been implemented for getting the best route between 5 given cities with given distances. The research has used 7 number of particles for a different number of iterations for generating the best route between those 5 cities. The overall latency has been reduced due to the applied optimization techniques. This paper also implemented and parallelized the same algorithm on CPU Intel I7 Processor; the result shows the FPGA implementation gives better results than CPU on the comparison of performance.