Design for reliability: The RF power LDMOSFET

Abstract

The design of lateral diffused MOSFETs operating under continuous peak power in RF communication applications is one of the most demanding among semiconductor applications. This paper discusses design parameters related to the optimum performance of the transistor and constraints introduced by the fabrication process in achieving them. Nonstandard processing steps include thick pad oxides, a p+ sinker to connect source to the bottom substrate, metal silicided gates, a source shield over the drift region, and often gold metallization for improved electromigration. Additionally, the device requires careful optimization for control of hot-carrier-related bias drift. The impact of negative charge injection in the gate oxide is to degrade the power gain and at higher output power levels, the linearity. The difficulties in assessment of the true impact of hot carriers on these parameters via measurement are highlighted. The contribution of matching impedances and class of bias on hot-carrier degradation is extracted via modeling. A "design for reliability" approach for this product is investigated with four designs of the drift region, evaluated in terms of transconductance, on-resistance, breakdown voltage, capacitance, and hot-carrier immunity. A second-generation source shield demonstrates a tradeoff via significant reduction of feedback capacitance at a cost to transconductance gm. A deep drift design shows optimization in terms of gain without compromise to the hot-carrier immunity. Recent advances made in terms of packaging and electromigration are reviewed. © 2007 IEEE.