Graph Neural Network based Netlist Operator Detection under Circuit Rewriting

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Abstract

Recently graph neural networks (GNN) have shown promise in detecting operators (multiplication, addition, comparison, etc.) and their boundaries in gate-level digital circuit netlists. Unlike formal approaches such as NPN Boolean matching, GNN-based methods are structural and statistical. This means that making structural changes to the circuit while maintaining its functionality may negatively impact their accuracy. In this paper, we explore this question. We show that indeed the prediction accuracy of GNN-based operator detection does fall following simple circuit rewriting. This means that custom rewrites may be a way to hamper operator detection in applications such as logic obfuscation where such undetectability is a security goal. We then present ways to improve the accuracy of prediction under such transforms by combining functional/semi-canonical information into the training and evaluation of the ML model.

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APA

Zhao, G., & Shamsi, K. (2022). Graph Neural Network based Netlist Operator Detection under Circuit Rewriting. In Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI (pp. 53–58). Association for Computing Machinery. https://doi.org/10.1145/3526241.3530330

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