Modeling of gate capacitance of GaN-based trench-gate vertical metal-oxide-semiconductor devices

Abstract

We propose a model for the gate capacitance of GaN-based trench-gate metal-oxide-semiconductor transistors, based on combined measurements, analytical calculations and TCAD simulations. The trench capacitance is found to be equivalent to four different capacitors, used to model the various regions with different doping and orientation of the semiconductor/dielectric interface. In addition, we demonstrate and explain the characteristic double-hump behavior of the G-D and G-DS capacitance of trench-MOSFETs. Lastly, a TCAD simulation results accurately reproduce the experimental data, thus confirming the interpretation on the double hump behavior, and providing insight on the electron density at the gate interface.