FPGA implementation of watermarking scheme using XSG

Abstract

Now a day's hardware realization of image processing applications using FPGA is an important area of research due to the speed of implementation, low development costs and less time to market. This is due to the parallelism existing in it. In this paper an efficient architecture for Digital Image Watermarking algorithm using Xilinx System Generator (XSG) is proposed. The objective is, to simulate, synthesize and implement Image Watermarking algorithm on FPGA platform. Hardware implementation of watermarking is realized using the Xilinx Block Sets presented in Simulink. The generated hardware software co-simulation block for Virtex6 FPGA, VHDL/Verilog code and the test-benches are tested on the FPGA development board. Then it is validated in terms of area, power and performance metrics.