Novel reconfigurable field-effect transistor with asymmetric spacer engineering at drain side

Abstract

In this article, a novel reconfigurable field-effect transistor with an asymmetric underlap channel extension at drain side (UCED-RFET) is proposed for the first time. The influence of underlap extension is investigated by extensive 3-D device simulation. Results show that compared to the conventional RFET with symmetrical underlap-channel extension at source and drain end, the ON-state saturated current (ION) of our proposed UCED-RFET is greatly increased without degenerating the OFF-state leakage current (IOFF), and the ratio of ION/IOFF is up to 109. The underlying physical mechanism is explored and the enhanced gate coupling is demonstrated to contribute to the improved performance in our proposed UCED-RFET. Moreover, the effects of gate dielectric materials and different spacers are investigated, and the results correlated with the scaling properties are also reported.