A 0.1-1.9 GHz 65nm CMOS variable-gain mixer-first receiver with DSA and noise-shaping TIA

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Abstract

In this letter, we proposed a highly linear mixer-first receiver with a discrete-step attenuator (DSA) and a noise-shaping TIA. A resistorreuse technique is devoted to improving linearity and attenuation flatness of the DSA with frequency independance, and a negative impedance chopping method is proposed to reduce the in-band noise of the TIA. Measurement results show that the receiver achieves > 13 dBm IIP3 and in-band noise floor has been depressed by 4 dB, with only consuming 2.82mW under 1.3V supply.

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APA

Song, Y., Wang, Y., Liu, J., Chen, H., & Yu, F. (2023). A 0.1-1.9 GHz 65nm CMOS variable-gain mixer-first receiver with DSA and noise-shaping TIA. IEICE Electronics Express, 20(9). https://doi.org/10.1587/elex.20.20230086

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