Graphical analysis and design of multistage operational amplifiers with active feedback Miller compensation

Abstract

Frequency compensation of a multistage operational amplifier (op-amp) is normally performed through solving nodal equations of an equivalent circuit to obtain the op-amp's final transfer function. The process is often very tedious and offers little insight into the roles of the selected compensation scheme. In this paper, we present a graphical design approach for two-stage and three-stage op-amps with active feedback Miller compensation. By viewing frequency compensation as a standard feedback problem, we can utilize the well-known graphical tools such as the root locus and Bode plot to understand the effects of the compensation and to estimate the locations of the closed-loop poles and zeros of the op-amp. Intuitive graphical design procedures for two-stage and three-stage op-amps are also formulated. To show its effectiveness, we illustrate our design approach through the design of a three-stage op-amp in a standard 0.18-μm complementary metal-oxide-semiconductor (CMOS) process. With a load capacitance of 500 pF, post-layout simulations show that the op-amp achieves a low-frequency gain of 144 dB, a phase margin of 58°, and a unity-gain frequency of 1.38 MHz while consuming a total bias current of 31 μA from a 1.8-V supply voltage. Comparisons with the published amplifiers show that our op-amp achieves the figure of merits comparable to those of the state of the art.