High-performance ZnO nanowire field-effect transistor with forming gas treated SiO2 gate dielectrics

Abstract

The SiO2 films thermally grown on Si wafer have been annealed in forming atmosphere (N2:H2 = 9:1) prior to use as gate insulators in ZnO nanowire field effect transistors (ZnO NW-FETs). Without the annealing process, ZnO NW-FETs exhibit very poor performance, and most of them even cannot be depleted under a high gate voltage of -100 V; however, with the annealing process in forming atmosphere, the device characteristics can be significantly improved, exhibiting a large turn on-off ratio of ∼104 and a low sub-threshold swing ∼1 V/decade. The pre-annealing treatment of SiO2 (300 nm)/p-Si in N2/H2 ambient may significantly reduce the number of non-bridging oxygen atoms, which blocks the interaction between ZnO nanowires and SiO2 surface, and finally enhances the electrical characteristics of the back-gated ZnO NW-FETs. In addition, the FET electrode fabrication process introduced in this paper is much simpler than the traditional photo-lithography and lift-off method, which has potential applications in future device fabrication.