A real-time motion-feature-extraction VLSI employing digital-pixel-sensor-based parallel architecture

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Abstract

A very-large-scale integration capable of extracting motion features from moving images in real time has been developed employing row-parallel and pixel-parallel architectures based on the digital pixel sensor technology. Directional edge filtering of input images is carried out in row-parallel processing to minimize the chip real estate. To achieve a real-time response of the system, a fully pixel-parallel architecture has been explored in adaptive binarization of filtered images for essential feature extraction as well as in their temporal integration and derivative operations. As a result, self-speed-adaptive motion feature extraction has been established. The chip was designed and fabricated in a 65-nm CMOS technology and used to build an object detection system. Motion-sensitive target image localization was demonstrated as an illustrative example.

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Zhu, H., & Shibata, T. (2014). A real-time motion-feature-extraction VLSI employing digital-pixel-sensor-based parallel architecture. IEEE Transactions on Circuits and Systems for Video Technology, 24(10), 1787–1799. https://doi.org/10.1109/TCSVT.2014.2313899

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