A Synchronverter-Based Magnitude Phase-Locked Loop

Abstract

A magnitude phase-locked loop (MPLL) is a system that synchronizes its output signal in frequency, phase, and magnitude with the dominant sinusoidal component of its input signal. We propose a novel MPLL design based on the model of a synchronverter [i.e., an inverter that behaves toward the power grid like a synchronous generator (SG)]. The synchronverter model is detached from its usual three-phase power electronics environment and transformed into a (single phase) MPLL with a wide pull-in range and great noise rejection properties. We prove synchronization under reasonable conditions. Extensive simulation results are provided to validate its performance and to compare it with existing solutions.