Modeling of Silicon Photonic Devices for Optical Interconnect Transceiver Circuit Design

Abstract

Optical interconnect system efficiency is dependent on the ability to optimize the transceiver circuitry for low-power and high-bandwidth operation, motivating co-simulation environments with compact optical device simulation models. This chapter presents compact Verilog-A silicon carrier-injection and carrier-depletion ring modulator models which accurately capture both nonlinear electrical and optical dynamics. Experimental verification of the carrier-injection ring modulator model is performed both at 8 Gb/s with symmetric drive signals to study the impact of pre-emphasis pulse duration, pulse depth, and dc bias, and at 9 Gb/s with a 65-nm CMOS driver capable of asymmetric pre-emphasis pulse duration. Experimental verification of the carrier-depletion ring modulator model is performed at 25 Gb/s with a 65-nm CMOS driver capable of asymmetric equalization.