Charge trapping at the low- k dielectric-silicon interface probed by the conductance and capacitance techniques

42Citations
Citations of this article
32Readers
Mendeley users who have this article in their library.
Get full text

Abstract

Trap states close to the interfaces in thin films of porous low- k dielectric materials are expected to affect interfacial barriers with contacts and consequently electrical leakage and reliability in these materials. These interfacial traps were investigated using capacitance and conductance measurements in metal/insulator/silicon capacitor structures composed of carbon-doped oxide low- k dielectric films with gold counterelectrodes. The measurements yielded information on the charge state of the low- k dielectric and an estimated density of traps near the Si interface of 2× 10 11 cm-2 eV-1, considerably greater than in typical SiO2 films. The effects of temperature and annealing were also investigated. An activation energy of 0.36±0.04 eV for trap filling and emptying was inferred. © 2008 American Institute of Physics.

Cite

CITATION STYLE

APA

Atkin, J. M., Cartier, E., Shaw, T. M., Laibowitz, R. B., & Heinz, T. F. (2008). Charge trapping at the low- k dielectric-silicon interface probed by the conductance and capacitance techniques. Applied Physics Letters, 93(12). https://doi.org/10.1063/1.2990648

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free