High-speed distance relaying using least error squares method and testing with FPGA

Abstract

The demand for high-speed protective relaying in modern power grids is growing. A relay's fast and secure operation to clear faults is critical, especially for EHV/UHV transmission systems (400â€.kV and above). This research proposes a sub-cycle distance relaying, which is based on the least error squares (LES) method, and with a data interface module implemented on field programmable gate array (FPGA). Taking advantage of inherent parallelism and pipelined architecture of the FPGA, the proposed relay design can support real-time data communications. Also, the flexible and reliable feature of the LES algorithm allows the proposed relay to make a fast and secure trip decision in different scenarios. The case studies demonstrate the effectiveness of the LES-based relay.