Abstract
This letter presents a high efficiency, and small group delay variations 12–24 GHz fully-integrated CMOS power amplifier (PA) for quasi-millimeter wave applications. Maximizing the power added efficiency (PAE), and minimizing the group delay variations in a wideband frequency range are achieved by optimizing the on-chip input, output, and inter-stage matching circuits. In addition, stagger tuning is employed for realizing excellent gain flatness. A two-stage CMOS PA using the proposed methodology is designed and fabricated in 0.18μm CMOS technology and tested. A measured power gain (|S21|) of 10.5 ± 0.7 dB and a measured small group delay variation of ±20 ps over the frequency range of interest are achieved. The PA shows a maximum measured PAE to be 26 % with DC power consumption of 50mW.
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CITATION STYLE
Mosalam, H., Allam, A., Jia, H., Abdelrahman, A., Kaho, T., & Pokharel, R. (2016). A 12 to 24GHz high efficiency fully integrated 0.18μm CMOS power amplifier. IEICE Electronics Express, 13(14). https://doi.org/10.1587/elex.13.20160551
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