PENERAPAN LOGIKA ALGORITMA PADA PROTOTIPE DATA BINER UNTUK GENERATOR KARTU FPGA

Abstract

The LFSR-based binary data sequence generator technique is used in various cryptographic applications and to design encoders / decoders in different communication channels. It is more important to test and verify by implementing on any hardware to get better effective results. Since FPGA is used to implement logical functions for faster prototype development, the existing LFSR design in the FPGA needs to be implemented to test and verify simulation and synthesis results between different lengths. The total number of random states generated in the LFSR depends on the feedback polynomial. The binary data generator is implemented using the LFSR shift register. This is a 23-bit shift register. The Random Number Generator allows you to generate random numbers of any length. The maximum length is 223−1