Abstract
Novel quaternary half adder, full adder, and a carry-lookahead adder are introduced. The proposed circuits are static and operate in voltage-mode. Moreover, there is no current flow in steady states, and thus no static power dissipation. Although the comparison in transistor count shows that the proposed quaternary circuits are larger than two respective binary ones, benefits in parallel addition arise from the use of multiple-valued logic. Firstly, the ripple-carry additions are faster because the number of carries are half compared to binary ones and the delay from the input carry through the output carry is relatively small. Secondly, the carry-lookahead scheme exhibits less complexity, which leads to overall reduction in transistor count for addition with a large number of bits. © 2001 IEEE.
Cite
CITATION STYLE
Thoidis, I. M., Soudris, D., Fernandez, J. M., & Thanailakis, A. (2001). The circuit design of multiple-valued logic voltage-mode adders. In ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings (Vol. 4, pp. 162–165). https://doi.org/10.1109/ISCAS.2001.922197
Register to see more suggestions
Mendeley helps you to discover research relevant for your work.