Wave Pipelined Area Efficient LDPC Encoder

Abstract

This paper present efficient design of Low Density Parity Check (LDPC) Encoder with wave psipeline. Comparing to decoding, LDPC Encoding was relatively more complex. There are several methods to perform encoding. Among all the existing methods to reduce parity check matrix Gauss Elimination method was used. To overcome the cons like latency and area overheads of conventional pipelining, Wave pipelining technique was used. LDPC encoding was designed with different stages of pipeline and the encoding performance is evaluated with wave pipeline. Implementation of this architecture was done on Xilinx FPGA XC2VP100 device. Wave pipeline will reduce the time delay and area overhead which can be proved by synthesis report.