A 31.3-dBm bulk CMOS T/R switch using stacked transistors with sub-design-rule channel length in floated p-wells

73Citations
Citations of this article
52Readers
Mendeley users who have this article in their library.
Get full text

Abstract

A 31.3-dBm 900-MHz bulk CMOS T/R switch with transmit (TX) and receive (RX) insertion losses of 0.5 and 1.0 dB and isolation of 29 dB is demonstrated. The switch utilizes a floating-body technique, feed-forward capacitors, and 3-stack 3.3-V MOSFETs with 0.26- μm sub-design-rule (SDR) channel length. Using these, a 28-dBm 2.4-GHz T/R switch with TX and RX insertion losses of 0.8 and 1.2 dB, and isolation of 24 dB is also demonstrated. The power handling capability is limited by an abrupt output power drop before reaching the normal 1-dB compression point. The circuits are implemented in the UMC 130-nm mixed-mode triple-well CMOS process. © 2007 IEEE.

Cite

CITATION STYLE

APA

Xu, H., & O, K. K. (2007). A 31.3-dBm bulk CMOS T/R switch using stacked transistors with sub-design-rule channel length in floated p-wells. In IEEE Journal of Solid-State Circuits (Vol. 42, pp. 2528–2534). https://doi.org/10.1109/JSSC.2007.907201

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free