A v Band Wideband Frequency Synthesizer Based on Hybrid Scheme of DDS and PLL

Abstract

A V band frequency synthesizer for local oscillator (LO) in an E-band superheterodyne receivers is reported in this paper. The frequency synthesizer is developed based on a hybrid scheme of direct digital frequency synthesis (DDS) and phase locked loop (PLL) techniques, followed by a six-time frequency multiplier. ADI's DDS IC AD9914 is adopted in this design to obtain high quality reference signal with frequency as high as 542-635MHz for the PLL. A step recovery diode (SRD)-based comb spectrum generator circuit combined with a frequency doubler is employed to generate the required DDS's clock signal with frequency up to 3.4GHz. A frequency tripler based on MACOM's schottky diode MA4E1310 is designed and employed to deliver the V band output signal. The measured results show that the operating frequency range of the frequency synthesizer is 52.0-61.0GHz. The output power is greater than 15 dBm with flatness better than ± 1.3dB. The measured phase noise is lower than -96 dBc /Hz @10 kHz and -97 dBc /Hz@100 kHz, and the spur suppression is better than 46 dBc in the range of 48.0∼65.0GHz.