MEPHESTO: Modeling energy-performance in heterogeneous SoCs and their trade-offs

Abstract

Integrated shared memory heterogeneous architectures are pervasive because they satisfy the diverse needs of mobile, autonomous,and edge computing platforms. Although specialized processingunits (PUs) that share a unified system memory improve performance and energy efficiency by reducing data movement, they alsoincrease contention for this memory since the PUs interact witheach other. Prior work has investigated performance degradationdue to memory contention, but few have studied the relationship ofpower and energy to memory contention. Moreover, a comprehensive solution that models memory contention for kernel placementon contemporary heterogeneous systems on chip (SoCs) in responseto energy and performance has been largely unaddressed.This paper presents MEPHESTO, a novel and holistic approachfor managing this balance. The authors characterize applicationsand PUs in terms of two memory contention factors-time factors and power factors-to achieve the desired trade-off betweenenergy and performance for collocated kernel execution on heterogeneous systems. The authors believe that this investigation isthe first to combine all of these factors and present a simple knobbased approach that expresses the target trade-off. The approach isevaluated on a diverse integrated shared memory heterogeneoussystem with a CPU, GPU, and programmable vision accelerator.By using an empirical model for memory contention that providesup to 92% accuracy, the kernel collocation approach can providea near-optimal ordering and placement based on the user-defined,energy-performance trade-off parameter. Moreover, the dynamicprogramming-based heuristics provide up to 30% better energyor 20% performance benefits when compared with the greedy approaches commonly employed by previous studies.