Fine Pitch Interconnect Rework for Lead-Free Flip Chip Packages

Abstract

Multiple device configurations, especially in 2.5D or 3D systems, are intimately tied to the successful implementation of very fine pitch, flip chip interconnection in order to optimize their potential for higher performance and smaller form factor. At the same time, such pitch reduction and increased I/O count create greater challenges to the interconnection process and its resulting reliability, imposing a greater focus on the overall process definition for these systems in a package, including the need to develop a suitable process to remove and replace individual defective device, more commonly known as device rework. However, the aforementioned trends in interconnect dimensions present significant challenges to the rework process as well, rendering conventional approaches difficult if not practically obsolete. It was therefore the goal of this study to investigate a localized thermal head separation approach for the rework of very fine pitch 2.5D/3D configurations that would obviate the need for solder redress/replenishment while preserving the overall integrity of both reworked and adjacent device. Adapting standard commercial thermo-compression bonding (TCB) tools, heating and separation parameters were investigated for removing an 11.1mm × 8.7mm device comprising Cu pillar/Pb-free solder interconnects from its underlying active TSV interposer assembled onto an organic laminate substrate. Initial joining parameters of the device (TCB versus furnace reflow bonding), peak temperature and holding times were varied to understand the sensitivity of the thermal separation process. Separation quality was characterized from the perspectives of fracture mode, separation metallurgy and residual pad height distribution. Results demonstrated that, while optimum conditions could be obtained for both shear and tensile solder separation approaches, the latter afforded a greater parameter window to avert undesirable separation interfaces (TiW-passivation) without introducing a solder dragging effect. However, should the issues of TiW-die passivation separation be resolved using functional die or thermal mismatch mitigation, the shear approach, as supported by Instron strength measurements, could be favorable to separate the interconnects at a lower force than tensile separation at temperatures below liquidus, thus avoiding the solder dragging issue. Height distribution measurements, while limited by the contact profilometer means combined with the uneven solder distribution on individual pads, appeared sufficiently consistent, at optimized separation parameters, to allow die replacement without the need for solder replenishment at the die site. While preliminary die replacement tests to validate this hypothesis showed a greater joining sensitivity of the reworked sites compared to non-reworked sites, means to improve oxide reduction and alignment were shown to improve and even correct joining issues, paving the way for future optimization of this very fine pitch, flip chip rework method.