A 60-GHz Adaptively Biased Power Amplifier with Predistortion Linearizer in 90-nm CMOS

Abstract

In this paper, a high output power high efficiency 4-way combining power amplifier (PA) is proposed. By using adaptive bias control and predistortion linearization simultaneously, both the backoff efficiency and output 1-dB compression point (OP1 dB) are enhanced. Comparing with conventional cold-FET linearizers, the proposed linearizer employed a differential feedback to gate and body exhibits greater gain compensation capability. The V-band PA in 90-nm CMOS demonstrates an OP 1 dB of 18.9 dBm, and a power-added efficiency at OP1dB of 13.9%.