FIELD-EFFECT TRANSISTOR.

Abstract

A metal-insulator-semiconductor device can be made in the form of a comb-shaped array using sidewall processing. This structure can be used to induce a spatially varying potential at the semiconductor surface. After the source and drain are defined and the gate oxide, in the case of a Si-MOSFET, or the GaAs gate insulator layer is deposited, in the case of a GaAs-gate heterojunction, a vertical sidewall is fabricated near the source end of the channel. This is done by reactive ion etching photoresist or another suitable material. Then a sequence of depositions is done at an oblique angle to the wafer surface (approx. 2 degree to the vertical face of the wall, or approx. 88 degree ) from the normal vector of the wafer. These depositions alternate between a 'hard' and 'soft' material, where 'hard' is defined to be an etch-resistant material and 'soft' is defined to be an easily-etched one.