Simulation of silicon waveguide single-photon avalanche detectors for integrated quantum photonics

Abstract

Integrated quantum photonics is recognized as a key enabling technology on the road towards scalable quantum networking schemes. However, many state-of-the-art integrated quantum photonics demonstrations still require the coupling of light to external photodetectors. On-chip silicon single-photon avalanche diodes (SPADs) provide a viable solution as they can be seamlessly integrated with photonic components, and operated with high efficiencies and low dark counts at temperatures achievable with thermoelectric cooling. In this paper, we report the design and simulation of silicon waveguide-based SPADs on a silicon-on-insulator platform for visible wavelengths, focusing on two device families with different doping configurations: p-n+ and p-i-n+. We calculate the photon detection efficiency (PDE) and timing jitter at an input wavelength of 640 nm by simulating the avalanche process using a 2-D Monte Carlo method, as well as the dark count rate (DCR) at 243 K and 300 K. For our simulated parameters, the optimal p-i-n+ SPADs show the best device performance, with a saturated PDE of 52.4±0.6% at a reverse bias voltage of 31.5 V, full-width-half-max (FWHM) timing jitter of 10 ps, and a DCR of <5 counts per second at 243 K.