Abstract
Panel-scale reconfigurable photonic interconnects on a glass substrate up to 500-mm × 500 -mm or larger are envisioned by proposing a novel photonic switch fabric that enables all directional panel-edge-to-panel-edge reach without active repeaters while offering high communication bandwidth, planar-direction reconfigurability, low energy consumption, and compelling data bandwidth density for heterogeneous integration of an in-package artificial intelligence computing system on a photonic interposer exceeding thousands of centimeters square. The proposed approach focuses on reconfigurable photonic interconnects, which are integration-compatible with commercial processor chiplets and 3-D high-bandwidth memory stacks, to create a novel panel-scale heterogeneously integrated package enabled by high-capacity wavelength-division-multiplexing optical data links using advanced optical modulators, broadband photodetector, novel optical crossbar switches with multilayer waveguides, and on-chip frequency comb sources.
Author supplied keywords
- Accelerator
- artificial intelligence (AI)
- bandwidth density
- chiplet-to-chiplet communication
- edge coupler
- energy efficiency
- frequency comb
- heterogeneous integration
- high-bandwidth memory (HBM)
- interconnect
- interposer
- large language model (LLM)
- micro bump
- micro-ring resonator (MRR)
- optical communication
- packaging
- power delivery
- power density
- processor
- racetrack resonator
- silicon photonics
- through-silicon via (TSV)
- through-substrate via (TSV)
- wavelength-division-multiplexing (WDM)
Cite
CITATION STYLE
Hsueh, T. C., Lin, B., Chen, Z., & Fainman, Y. (2025). Panel-Scale Reconfigurable Photonic Interconnects for Scalable AI Computation. IEEE Open Journal of the Solid-State Circuits Society, 5, 437–453. https://doi.org/10.1109/OJSSCS.2025.3620371
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