On-line transition-time monitoring for die-to-die interconnects in 3D ICs

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Abstract

Through Silicon Vias (TSVs) are known to be susceptible to various thermal-mechanical and electro-migration effects that could lead to unexpected resistance increase after certain time of field operation. To cope with this reliability threat, we present an on-line monitoring method that aims to continuously detect excessive transition time occurring to a TSV (which often indicates performance degradation). Our method attaches a monitor to the termination end of a TSV. Any transition there is converted into a pulse-width, which is further compared to a dynamically tunable threshold. A Timing Failure Threat (TFT) is thereby detected when the pulse-width exceeds the threshold. This method can be applied to a large number of TSVs easily since the monitoring results are binary and can be stored in FFs forming a scan chain for easy access.

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Huang, S. Y., Li, H. X., Zeng, Z. F., Tsai, K. H., & Cheng, W. T. (2014). On-line transition-time monitoring for die-to-die interconnects in 3D ICs. In Proceedings of the Asian Test Symposium (pp. 162–167). IEEE Computer Society. https://doi.org/10.1109/ATS.2014.39

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