DPW-LRU: An Efficient Buffer Management Policy Based on Dynamic Page Weight for Flash Memory in Cyber-Physical Systems

Abstract

Owing to its high performance, small size, and low energy consumption, NAND flash memory has been extensively adopted in cyber-physical systems. However, the inherent characteristics of flash memory, including not-in-place update and asymmetric I/O latencies, present difficulties in the design of buffer management policies. In this paper, we propose an enhanced buffer management policy for the flash memory referred to as dynamic page weight least recently used (DPW-LRU), which considers temporal locality and simultaneously provides effective utilization of limited buffer resources. Page migration is further enhanced by identifying the page access mode and frequency while separating the buffer into two different regions. A novel eviction algorithm is also designed to reduce the write operations and maintain a high hit ratio of the buffer regions, combining dynamic temporal locality, real-time eviction cost, and recency of pages. The experimental results show that DPW-LRU improves the hit ratio by up to 8.3%, decreases the write operation by up to 22.6%, and reduces the overall latency by up to 18.8% relative to those of other state-of-the-art buffers management policies.