Rethinking Programmable Earable Processors

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Abstract

Earables such as earphones [15, 16, 73], hearing aids [28], and smart glasses [2, 14] are poised to be a prominent programmable computing platform in the future. In this paper, we ask the question: what kind of programmable hardware would be needed to support earable computing in future? To understand hardware requirements, we propose EarBench, a suite of representative emerging earable applications with diverse sensor-based inputs and computation requirements. Our analysis of EarBench applications shows that, on average, there is a 13.54×-3.97× performance gap between the computational needs of EarBench applications and the performance of the microprocessors that several of today's programmable earable SoCs are based on; more complex microprocessors have unacceptable energy efciency for Earable applications. Our analysis also shows that EarBench applications are dominated by a small number of digital signal processing (DSP) and machine learning (ML)-based kernels that have signifcant computational similarity. We propose SpEaC-a coarse-grained reconfgurable spatial architecture-as an energy-efcient programmable processor for earable applications. SpEaC targets earable applications efciently using a) a reconfgurable fxed-point multiply-and-add augmented reduction tree-based substrate with support for vectorized complex operations that is optimized for the earable ML and DSP kernel code and b) a tightly coupled control core for executing other code (including non-matrix computation, or non-multiply or add operations in the earable DSP kernel code). Unlike other CGRAs that typically target general-purpose computations, SpEaC substrate is optimized for energy-efcient execution of the earable kernels at the expense of generality. Across all our kernels, SpEaC outperforms programmable cores modeled after M4, M7, A53, and HiFi4 DSP by 99.3×, 32.5×, 14.8×, and 9.8× respectively. At 63 mW in 28 nm, the energy efciency benefts are 1.55×, 9.04×, 68.3×, and 32.7× respectively; energy efciency benefts are 15.7×-1087× over a low power Mali T628 MP6 GPU.

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APA

Bleier, N., Mubarik, M. H., Chakraborty, S., Kishore, S., & Kumar, R. (2022). Rethinking Programmable Earable Processors. In Proceedings - International Symposium on Computer Architecture (pp. 454–467). Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1145/3470496.3527396

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