Graphene-Based Wireless Agile Interconnects for Massive Heterogeneous Multi-Chip Processors

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Abstract

The main design principles in computer architecture have recently shifted from a monolithic scaling-driven approach to the development of heterogeneous architectures that tightly co-integrate multiple specialized processor and memory chiplets. In such data-hungry multi-chip architectures, current Networks-in-Package (NiPs) may not be enough to cater to their heterogeneous and fast-changing communication demands. This position article makes the case for wireless in-package networking as the enabler of efficient and versatile wired-wireless interconnect fabrics for massive heterogeneous processors. To that end, the use of graphene-based antennas and transceivers with unique frequency-beam reconfigurability in the terahertz band is proposed. The feasibility of such a wireless vision and the main research challenges toward its realization are analyzed from the technological, communications, and computer architecture perspectives.

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Abadal, S., Guirado, R., Taghvaee, H., Jain, A., De Santana, E. P., Bolivar, P. H., … Sebastian, A. (2023). Graphene-Based Wireless Agile Interconnects for Massive Heterogeneous Multi-Chip Processors. IEEE Wireless Communications, 30(4), 162–169. https://doi.org/10.1109/MWC.010.2100561

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