Implementation of Leakage Power Reduction Techniques in Field Programmable Device

Abstract

This paper provide a summary of low-power technique for field-programmable gate arrays (FPDs). It cover system level propose technique as well as device level propose methods that have besieged present trade devices. In addition to describe present investigate happening circuit level as well as architecture-level create technique. Current studies on power model as well as on low-power computer-aided design (CAD) are also information. At last, it proposes that would allow the use of Field Programmable Device (FPD) equipment in applications where power and energy consumption is critical, such as mobile devices.