A perspective on symmetric lateral bipolar transistors on SOI as a complementary bipolar logic technology

Abstract

Recently published reports suggest that symmetric lateral bipolar transistors on semiconductor-on-insulator (SOI) is CMOS compatible in fabrication process, and can be much denser than CMOS due to their much larger (5-10× larger) drive-current capability. When used in traditional bipolar circuits, SOI bipolar offers much lower power dissipation and/or much higher maximum speed. With both NPN and PNP devices of comparable characteristics, SOI lateral bipolar suggests the possibility of complementary bipolar (CBipolar) circuits in configurations analogous to CMOS. In this paper, the performance versus power dissipation of CBipolar circuits is examined using analytic equations. It is shown that for CBipolar to be superior to CMOS in both performance and power dissipation, narrow-gap-base heterojunction structures, such as Si emitter with Ge base or Si emitter with SiGe base, are required.