A 24mW, 5Gb/s fully balanced differential output trans-impedance amplifier with active inductor and capacitive degeneration techniques in 0.18μm CMOS technology

9Citations
Citations of this article
10Readers
Mendeley users who have this article in their library.

Abstract

In this paper, a low power 24mW 5Gb/s differential output transimpedance amplifier (TIA) is realized in 0.18μm CMOS technology for optical interconnect application. The TIA is a fully balanced and differential architecture design that can improve immunity with the common mode noise attributed to the power supply. The differential gain achieved is 66dBΩ with a -3dB bandwidth of 4.0GHz for a 0.5pF photodiode capacitance (Cpd) by implementing both the active inductor peaking and capacitive degeneration techniques. The TIA core consumes only 24mW power from a single 1.8V power supply while achieving the sensitivity of -19.0dBm for a bit error rate (BER) of 10-12. © IEICE 2010.

Cite

CITATION STYLE

APA

Shammugasamy, B., Zulkifli, T. Z. A., & Ramiah, H. (2010). A 24mW, 5Gb/s fully balanced differential output trans-impedance amplifier with active inductor and capacitive degeneration techniques in 0.18μm CMOS technology. IEICE Electronics Express, 7(4), 308–313. https://doi.org/10.1587/elex.7.308

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free